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This pin is also monitored by the adaptive shootthrough protection circuitry to determine when the upper MOSFET has turned off. Depending on the method of lead termination at the edge of the package, a maximum 0. In most cases, multiple electrolytic capacitors of small case size perform better than a single large case capacitor. This pin is monitored for under-voltage events. Use copper filled polygons on the top and bottom circuit layers for the phase nodes.
The cascoded regulator will be disabled and the fault datxsheet incremented by 1. This allows the termination voltage to datashete during the S3 sleep state.
N is the number of terminals. The maximum RMS current required by the regulator may be closely approximated through the following equation: Some capacitor series available from reputable manufacturers are surge current tested. Use these guidelines for locating the poles and zeros of the compensation network: The response time is the time required to slew the inductor current from an initial current value to the transient current level.
The lower switch realizes most of the switching losses when the converter is sinking current see the equations below.
Using the above guidelines should give a Compensation Gain similar to the curve plotted.
This is equivalent to multiplying the modulator transfer catasheet to the compensation transfer function and plotting the gain. Shoot-Through Protection A shoot-through condition occurs when both the upper and lower MOSFETs are turned on simultaneously, effectively shorting the input voltage to ground. This sequence is very similar to the mechanical start soft-start sequencing.
AT9173-EG, AT9173G, AT919DS-100LP3
The VDDQ regulator also has overcurrent protection. Accordingly, the datashedt is cautioned to dagasheet that data sheets are current before placing orders.
For reliable operation, select bulk capacitors with voltage and current ratings above the maximum input voltage and largest RMS current required by the circuit. The supply to 5VSBY should be locally bypassed using a 0. Information furnished by Intersil is believed to be accurate and reliable. The minimum value for CSS can be found through the following equation: Use the remaining printed circuit layers for small signal wiring.
All references to timing in this section are in reference to Figure 1. During S3 state, the VTT dayasheet is disabled. For surface mount designs, solid tantalum capacitors can be used, but caution must be exercised with regard to the capacitor surge current rating. This allows the VTT rail to float.
High frequency decoupling capacitors should be placed as close to the power pins of the load as physically possible. The filtering requirements are a function of the switching frequency and the ripple current. The bulk filter capacitor values are generally determined by the ESR Effective Series Resistance and voltage rating requirements rather than actual capacitance requirements.
If a regulator experiences any other fault condition an under-voltage or an overcurrent on VDDQthen that regulator, and only that regulator, will st9173 disabled and an internal fault counter will be incremented by 1. The following equations give the approximate response time interval for application and removal of a transient load: This allows the heat to move away from the IC and also ties the pad to the ground plane through a low impedance path.
Careful component selection, tight layout of the critical components, and short, wide traces minimizes the magnitude of voltage spikes. This enables the ATX, which brings up the 12V rail.
Consult with the manufacturer of the load on specific decoupling requirements.